Silicon Laboratories Stepper Machine Manual do Utilizador descarregar pdf (Página 30)

AN428

30 Rev. 0.6

//-----------------------------------------------------------------------------

// SMBus ISR state machine

// - Master only implementation - no slave or arbitration states defined

// - All incoming data is written starting at the global pointer <pSMB_DATA_IN>

// - All outgoing data is read from the global pointer <pSMB_DATA_OUT>

INTERRUPT(SMBus_ISR, INTERRUPT_SMBUS0)

{

bit FAIL = 0; // Used by the ISR to flag failed

// transfers

static char i; // Used by the ISR to count the

// number of data bytes sent or

// received

static bit SEND_START = 0; // Send a start

switch (SMB0CN & 0xF0) // Status vector

{

// Master Transmitter/Receiver: START condition transmitted.

case SMB_MTSTA:

SMB0DAT = TARGET; // Load address of the target slave

SMB0DAT &= 0xFE; // Clear the LSB of the address for the

// R/W bit

SMB0DAT |= SMB_RW; // Load R/W bit

STA = 0; // Manually clear START bit

i = 0; // Reset data byte counter

break;

// Master Transmitter: Data byte (or Slave Address) transmitted

case SMB_MTDB:

if (ACK) // Slave Address or Data Byte

{ // Acknowledged?

if (SEND_START)

{

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Silicon Laboratories Stepper Machine Manual do Utilizador Página 30